Controlling I/O Termination
This topic contains details about configuring I/O.
These termination techniques range from the weak resistive pull-up circuit, the p r keeper circuit ( also known as a “bus hold” circuit) and user-configurable ground pins. These termination features, where current, are controllable on either a per-pin or whole unit basis, with respect to the CPLD family members. Termination on I/O pins found in your design and termination on unused I/O pins are controlled separately.
Whenever a pad is perhaps not driven either externally or by the CPLD macrocell, the resistive pull-up circuit, if enabled, keeps a top logic state to stop the pad from floating. Whenever a low logic degree is placed on the pad, the pull-up continues to supply handful of present.
The keeper that is weak, if enabled, drives a weak 0 or 1 degree to match the amount it detects on the pad. When the pad is driven externally, transitions that override the weak keeper production change the state of the weak keeper’s production to match. No further current is transferred through the I/O structure after the initial “crowbar current” used to override the weak keeper. If the pad is maybe not driven either externally or by the CPLD macrocell, the p r keeper circuit keeps the very last logic state present on the pad to avoid the pad from drifting.
Unused I/O pins on most CPLDs can be configured as supplemental ground pins. The device’s ground rail keeps the pin at a low logic state to prevent it from floating if these pins are left unconnected on the board. If these pins are linked to the board ground plane, they contribute to the grounding associated with the device and help further reduce any ground noise that could be caused by production sinking present.
C lRunner-II products have all three termination features available. For input pins, tristate production (or I/O) pins and open-drain output (or I/O) pins used in your design, you are able to pick if the pin is terminated or left drifting on a per-pin basis. Terminated pins uses either resistive pull-up or keeper that is weak. However, the selection between those two varieties of termination is configured globally over the whole device. That is, you cannot mix resistive pull-up and p r keeper into the same design.
By default, the fitter configures all input and tristate I/O pins in the design to have p r keeper termination. This default can be changed by you to Pull-up or Float utilizing the Project Navigator property “Input and tristate production Termination” for the Fit (Implement Design) procedure. Additionally by default, the fitter configures all unused I/O pins to own keeper termination that is weak. You are able to replace the termination for many unused I/O pins to Pull-up, Float or Configurable Grounds using the venture Navigator property “Unused I/O Termination” for the Fit (Implement Design) procedure. By default, all open-drain outputs (and I/Os) could have no termination (drifting).
If you replace the Input and tristate production Termination property to Float, it is possible to configure selected I/O pins become terminated by making use of the PULLUP or KEEPER attribute towards the I/O pad in your design. It is possible to apply PULLUP or KEEPER to open-drain outputs (or I/Os) in your design if those pins are wanted by you become terminated. Outputs being constantly active (neither open-drain or tristate) not have termination.
Weak keeper termination takes precedence over pull-up termination whenever they both occur in the same design. If any used or unused I/O pin within the unit uses the weak keeper kind of termination, either in line with the venture Navigator home or by utilization of the KEEPER attribute, then any PULLUP attribute (or venture Navigator Pull-up setting) will immediately be interpreted as being a KEEPER. Apart from this limitation, you’re free to mix drifting I/O pins, configurable grounds and pins terminated with either PULLUP or KEEPER (but not both) in the design that is same.
The termination is indicated by the Fitter Report mode used on each I/O pin in the design. From floating if you ch se to leave unused I/O pins floating, the Fitter Report will also indicate “TIE” in the pinout section for these pins, indicating that it is up to you to tie these pins to a valid logic level to prevent them. Preventing I/O pins from floating, whether the pins are unused or whether they are inputs or tristate outputs left undriven when disabled, is an part that is essential of energy usage in CPLD design.
C lRunner XPLA3 devices have just the resistive pull-up form of termination, and termination is available only on input-only pins and unused I/O pins. By standard, all input pins in a XPLA3 hop over to here design are perhaps not ended (float). It is possible to alter this default to Pull-up utilizing the Project Navigator property “Input Termination” for the Fit (Implement Design) process. If the venture Navigator setting is kept set to Float, you are able to configure chosen inputs to be ended by applying the PULLUP attribute towards the input pads in your design. By standard, all unused I/O pins in a XPLA3 design are terminated with pull-up. You’ll disable termination by selecting Float into the Project Navigator property “Unused Pin Termination” for the Fit (Implement Design) procedure. From floating if you ch se to leave unused I/O pins floating, the Fitter Report will also indicate “TIE” in the pinout section for these pins, indicating that it is up to you to tie these pins to a valid logic level to prevent them. Preventing I/O pins from floating, whether the pins are unused or if they are inputs or tristate outputs left undriven whenever disabled, is definitely an essential section of reducing energy usage in CPLD design.
XC9500XL and XC9500XV products have actually weak keeper circuits on all I/O pins to avoid them from floating. It is possible to configure all unused I/O pins as supplemental ground pins by enabling the venture Navigator property “Create Programmable GND Pins on Unused I/O” for the Fit (Implement Design) procedure. (The PULLUP and KEEPER characteristics don’t affect XC9500-Series devices.)
The design that is following configure Inputs and Outputs.